Sample Cisco HDLC Configuration File: cisco0.cfg
; level 2 configuration ET5025 ;Board Definition (ET5025 or ET502516) 0 ;System Port Number (ie eth0 = 0, eth1=1, etc) 0x84 ;Protocol (0x84 = Cisco HDLC Encapsulation) Variables - Transparent HDLC 3000 ;T1 5000 ;T3 - Idle Timer (not used) 1604 ;N1 - maximum Frame Size ; Transparent mode setup (see MK5025 specification) 1 ;FCS (1 = 16bit 0 = 32bit) 1 ;DACE - Control/Address Extraction 1 ;PROM - Address Filtering 0 ;EXTA - Extended Address HDLC rules (1 = Enable) 0 ;EXTAF - Extended Address Force (1 = Enable) 0 ;EXTC - Extended Control for S and I Frames (1 = Enable) 0 ;EXTCF - Extended Control All Frames (1 = Enable) 0 ;DRFCS - Disable Receiver FCS Checking 0 ;DTFCS - Disable Transmitter FCS Generation ; Board Configuration 0xD0000 ;memory base address (Physical Memory Address) 32 ;ram (32 or 64) 0 ;8-bit memory mode (1 = enable) 0 ;Wait State (1 = enable 1 WS) 0 ;memory sharing (1=enable) 0x240 ;io base address 5 ;IRQ interrupt 0 ;half duplex (0 = full duplex) 0 ;ignore modem control signals (1 = ignore CD and DSR) 20 ;board clock rate 0 ;CPU Clock Rate (0 = Normal, 1 = 20/25mhz) 0 ;Internal Clock Rate (0 = EXTERNAL) ; Controller setup 2 ;minimum flags between frames (1,2,4 or 6) 16 ;dma burst (2,16,64) 4 ;hardware transmit buffers 4 ;hardware receive buffers 1 ;transmit interrupt enable
Sample Cisco HDLC Configuration File: cisco0.pci.cfg
; level 2 configuration ET5025PQ ;Board Definition 0 ;System Port Number (ie eth0 = 0, eth1=1, etc) 0 ;Board Number 0 ;Port Number 0x84 ;Protocol (0x84 = Cisco HDLC Encapsulation) Variables - Transparent HDLC 3000 ;T1 5000 ;T3 - Idle Timer (not used) 1604 ;N1 - maximum Frame Size ; Transparent mode setup (see MK5025 specification) 1 ;FCS (1 = 16bit 0 = 32bit) 1 ;DACE - Control/Address Extraction 1 ;PROM - Address Filtering 0 ;EXTA - Extended Address HDLC rules (1 = Enable) 0 ;EXTAF - Extended Address Force (1 = Enable) 0 ;EXTC - Extended Control for S and I Frames (1 = Enable) 0 ;EXTCF - Extended Control All Frames (1 = Enable) 0 ;DRFCS - Disable Receiver FCS Checking 0 ;DTFCS - Disable Transmitter FCS Generation ; Board Configuration 0xD0000 ;memory base address (Physical Memory Address) 32 ;ram (32 or 64) 0 ;8-bit memory mode (1 = enable) 0 ;Wait State (1 = enable 1 WS) 0 ;memory sharing (1=enable) 0x240 ;io base address 5 ;IRQ interrupt 0 ;half duplex (0 = full duplex) 0 ;ignore modem control signals (1 = ignore CD and DSR) 20 ;board clock rate 0 ;CPU Clock Rate (0 = Normal, 1 = 20/25mhz) 0 ;Internal Clock Rate (0 = EXTERNAL) ; Controller setup 2 ;minimum flags between frames (1,2,4 or 6) 16 ;dma burst (2,16,64) 4 ;hardware transmit buffers 4 ;hardware receive buffers 1 ;transmit interrupt enable
Sample Cisco HDLC Configuration File: hdlc0.hssi.cfg
; level 2 configuration ETHSSI ;Board Definition (must be ET5025) 0 ;System Port Number (ie eth0 = 0, eth1=1, etc) 0 ;Board Number 0 ;Port on this board 0x84 ;Protocol (0x84 = Cisco HDLC) HDLC Variables 1604 ;N1 - maximum Frame Size ; Board Configuration 0 ;ignore modem control signals (1 = ignore CA) 0 ;Clock Oscillator Rate (If installed) 0 ;Internal Baud Rate (0 = EXTERNAL) ; Controller setup
0 ;HP Bit 0 ;Clock Mode 16 ;hardware transmit buffers 32 ;hardware receive buffers
Sample ET/5025/ET/5025-16 Frame Relay Configuration File: FR0.CFG
; level 2 configuration ET5025 ;Board Definition (ET5025 or ET502516) 0 ;System Port Number (ie eth0 = 0, eth1=1, etc) 0x14 ;Protocol (0x14 = Frame Relay) ; Variable Section - Frame Relay 10000 ;nT1 (User Mode), nT2 (Net Mode) (in milliseconds) 1604 ;dN1 - maximum frame size (bytes/octets) MTU+4 for Frame Relay 5 ;nN1 - user AutoLMI full status frame rate 3 ;nN2 - LMI error threshold 5 ;nN3 - measurement interval for nN2 ;Setup Section - Frame Relay (LMI Mode) 0 ;LMI Channel (0 for ANSI, 1023 for LMI) 0 ;(0 = 1024 DLCIs, 1 = 8192 DLCIs) 0 ;Initial mode (0 = User, 1 = Net, 2 = LMI disabled) 0 ;Implementation (0 = ANSI, 1 = LMI(Gang of Four)) 0 ;1 = LMI extensions enabled 0 ;Frame Relay Congestion (0 = disabled) ; Board Configuration 0xD0000 ;memory base address (Physical Memory Address) 32 ;ram (32 or 64) 0 ;8-bit memory mode (1 = enable) 0 ;Wait State (1 = enable 1 WS) 0 ;memory sharing (1=enable) 0x240 ;io base address 5 ;IRQ interrupt 0 ;half duplex (0 = full duplex) 0 ;ignore modem control signals (1 = ignore CD and DSR) 20 ;board clock oscillator rate 0 ;CPU Clock Rate (0 = Normal, 1 = 20/25mhz) 0 ;Internal Baud Clock Rate (0 = EXTERNAL) ; Controller setup 2 ;minimum flags between frames (1,2,4 or 6) 16 ;dma burst (2,16,64) 4 ;hardware transmit buffers 8 ;hardware receive buffers 1 ;transmit interrupt enable
Sample ET/5025PQ Frame Relay Configuration File: fr0.pci.cfg
; level 2 configuration ET5025PQ ;Board Definition (ET5025 or ET502516) 0 ;System Port Number (ie eth0 = 0, eth1=1, etc) 0 ;Board Number 0 ;Port on this board 0x14 ;Protocol (0x14 = Frame Relay) ; Variable Section - Frame Relay 10000 ;nT1 (User Mode), nT2 (Net Mode) (in milliseconds) 1604 ;dN1 - maximum frame size (bytes/octets) MTU+4 for Frame Relay 5 ;nN1 - user AutoLMI full status frame rate 3 ;nN2 - LMI error threshold 5 ;nN3 - measurement interval for nN2 ;Setup Section - Frame Relay (LMI Mode) 0 ;LMI Channel (0 for ANSI, 1023 for LMI) 0 ;(0 = 1024 DLCIs, 1 = 8192 DLCIs) 0 ;Initial mode (0 = User, 1 = Net, 2 = LMI disabled) 0 ;Implementation (0 = ANSI, 1 = LMI (Gang of Four)) 0 ;1 = LMI extensions enabled 0 ;Frame Relay Congestion (0 = disabled) ; Board Configuration 0 ;ignore modem control signals (1 = ignore CD and DSR) 20 ;board clock oscillator rate (1 = speed, 0 = half speed) 0 ;CPU Clock Rate (0 = Normal, 1 = 20/25mhz) 0 ;Internal Baud Clock Rate (0 = EXTERNAL) ; Controller setup 2 ;minimum flags between frames (1,2,4 or 6) 16 ;dma burst (2,16,64) 4 ;hardware transmit buffers 8 ;hardware receive buffers 1 ;transmit interrupt enable
Sample ET/HSSI Frame Relay Configuration File: fr0.hssi.cfg
; level 2 configuration ETHSSI ;Board Definition 0 ;System Port Number (ie eth0 = 0, eth1=1, etc) 0 ;Board Number 0 ;Port on this board 0x14 ;Protocol (0x14 = Frame Relay) ; Variable Section - Frame Relay 10000 ;nT1 (User Mode), nT2 (Net Mode) (in milliseconds) 1604 ;dN1 - maximum frame size (bytes/octets) MTU+4 for Frame Relay 5 ;nN1 - user AutoLMI full status frame rate 3 ;nN2 - LMI error threshold 5 ;nN3 - measurement interval for nN2 ;Setup Section - Frame Relay (LMI Mode) 0 ;LMI Channel (0 for ANSI, 1023 for LMI) 0 ;(0 = 1024 DLCIs, 1 = 8192 DLCIs) 0 ;Initial mode (0 = User, 1 = Net, 2 = LMI disabled) 0 ;Implementation (0 = ANSI, 1 = LMI (Gang of Four)) 0 ;1 = LMI extensions enabled 0 ;Frame Relay Congestion (0 = disabled) ; Board Configuration 0 ;ignore modem control signals (1 = ignore CA) 0 ;Clock Oscillator Rate (If installed) 0 ;Internal Baud Rate (0 = EXTERNAL) ; Controller setup
0 ;HP Bit 0 ;Clock Mode 16 ;hardware transmit buffers 32 ;hardware receive buffers
Sample ET/5025 / ET/5025-16 PPP Configuration File: ppp0.cfg
; level 2 configuration ET5025 ;Board Definition (ET5025 or ET502516) 0 ;System Port Number (ie eth0 = 0, eth1=1, etc) 0x44 ;Protocol (0x44 = PPP) Variables - Transparent HDLC 3000 ;T1 1604 ;N1 - maximum Frame Size ; Board Configuration 0xD0000 ;memory base address (Physical Memory Address) 32 ;ram (32 or 64) 0 ;8-bit memory mode (1 = enable) 0 ;Wait State (1 = enable 1 WS) 0 ;memory sharing (1=enable) 0x240 ;io base address 5 ;IRQ interrupt 0 ;half duplex (0 = full duplex) 0 ;ignore modem control signals (1 = ignore CD and DSR) 20 ;board clock rate 0 ;CPU Clock Rate (0 = Normal, 1 = 20/25mhz) 0 ;Internal Clock Rate (0 = EXTERNAL) ; Controller setup 2 ;minimum flags between frames (1,2,4 or 6) 16 ;dma burst (2,16,64) 4 ;hardware transmit buffers 4 ;hardware receive buffers 1 ;transmit interrupt enable
Sample ET/5025PQ PPP Configuration File: ppp0.pci.cfg
; level 2 configuration ET5025PQ ;Board Definition (must be ET5025) 0 ;System Port Number (ie eth0 = 0, eth1=1, etc) 0 ;Board Number 0 ;Port on this board 0x44 ;Protocol (0x44 = PPP) Variables - Transparent HDLC 3000 ;T1 - Protocol Timer 1604 ;N1 - maximum Frame Size ; Board Configuration 0 ;ignore modem control signals (1 = ignore CD and DSR) 20 ;board clock rate 0 ;CPU Clock Rate (0 = half clock, 1 = full clock) 0 ;Internal Clock Rate (0 = EXTERNAL) ; Controller setup 2 ;minimum flags between frames (1,2,4 or 6) 16 ;dma burst (2,16,64) 8 ;hardware transmit buffers 8 ;hardware receive buffers 1 ;transmit interrupt enable
Sample ET/HSSI PPP Configuration File: ppp0.hssi.cfg
; level 2 configuration ETHSSI ;Board Definition (must be ET5025) 0 ;System Port Number (ie eth0 = 0, eth1=1, etc) 0 ;Board Number 0 ;Port on this board 0x44 ;Protocol (0x44 = PPP) Variables - Transparent HDLC
3000 ;T1 - T1 protocol Timerj 1604 ;N1 - maximum Frame Size
; Board Configuration 0 ;ignore modem control signals (1 = ignore CA) 0 ;Clock Oscillator Rate (If installed) 0 ;Internal Baud Rate (0 = EXTERNAL) ; Controller setup
0 ;HP Bit 0 ;Clock Mode 16 ;hardware transmit buffers 32 ;hardware receive buffers
Sample X.25 Configuration File: x250.cfg
; level 2 configuration ET5025 ;Board Definition 0x20 ;Protocol (0 = LAPB, 0x14 = Frame Relay, 0x20 = X.25) ; LAPB variables 3000 ;T1 timeout (in milliseconds) 500 ;T2 (Not Implemented) 5000 ;T3 (ET/5025 only) 0 ;T203 (Configure T3 to poll on idle timeout) 269 ;N1 - max frame size 15 ;N2 - retry count 5 ;N3 - Not Implemented 7 ;k - frame window size ; LAPB setup 0 ;extended frame sequencing (0 = mod 8 1 = mod 128) 1 ;HDLC local address (1 or 3 for LAPB) 3 ;HDLC remote address (1 or 3 for LAPB) ; Board Configuration 0xd0000 ;memory base address 32 ;ram (32 or 64) 0 ;8-bit memory mode (1 = enable) 0 ;Wait State 0 ;memory sharing (1=enable) 0x240 ;io base address 10 ;irq interrupt 0 ;half duplex (0 = full duplex) 0 ;ignore modem control signals (1 = ignore CD and DSR) 20 ;board clock rate (Clock Oscillator rate) 0 ;cpu clock rate (0 = 1/2, 1=full rate) 56000 ;baud rate (0 = External) ; LAPB controller setup 2 ; minimum flags between frames (1,2,4 or 6) 16 ; dma burst (2,16 or 64) 8 ; Hardware Tx buffers 8 ; Hardware Rx buffers 1 ; tx interrupt enable (0 = disabled) ; level 3 parameters 5551213 ;dtn of this line (null for no address) null ;nui 0 ;system server pvc (0) 0 ;number of pvcs 1 ;low logical channel for pvcs 0 ;number of one-way incoming channels 1 ;low logical channel for incoming svc 4 ;number of two-way channels 2 ;low logical channel for two-way svcs 0 ;number of one-way outgoing channels 1 ;low logical channel for outgoing svcs 0 ;packet sequencing (0 = mod 8 1 = mod 128) 2 ;default packet level window (incoming) 2 ;default packet level window (outgoing) 7 ;maximum window size (when negotiated) 128 ;default packet size in (when not negotiated) 128 ;default packet size out (when not negotiated) 256 ;maximum data packet size (128,256) (excluding 3 byte header) 1 ;packet size negotiation permitted (0 = NO) 1 ;window size negotiation permitted (0 = NO) 1 ;throughput negotiation permitted (0 = NO) 1 ;fast select permitted (0 = NO) 1 ;RR Algorithm 20 ;t20 timeout 20 ;t21 timeout 20 ;t22 timeout 20 ;t23 timeout 0 ;autocall 0=NO 1=Yes 0 ;not used 0 ;not used 0 ;not used 0 ;not used 10 ;idle timeout (in minutes) 20 ;call hold time (in seconds)